Dr. Snavely is an expert in high performance computing (HPC); he has published many papers on this subject, is primary investigator (PI) on several federal research grants; notably he is Co-PI in charge of the performance modeling thrust for PERC (the Performance Evaluation Research Center), a SciDAC ISIC. He is an Adjunct Assistant Professor in the Univerity of California at San Diego's Department of Computer Science and is the director of the Performance Modeling and Characterization (PMaC) Laboratory at the San Diego Supercomputer Center.